1. Field of the Invention
The present invention relates to a solid-state imaging apparatus which can be used in an image reader apparatus such as a copying machine and a scanner.
2. Description of the Related Art
As the solid-state imaging apparatus for use in the image reader apparatus such as a copying machine and a scanner, for example, Japanese Patent Application Laid-Open No. 2006-211363 (hereinafter referred to as Patent Document 1) discloses a solid-state imaging apparatus including photodiodes each reading a plurality of color components and having a holding capacitor corresponding to each photodiode as illustrated in FIG. 1.
Japanese Patent Application Laid-Open No. H06-204445 (hereinafter referred to as Patent Document 2) discloses a solid-state imaging apparatus which illustrates one common output line, but illustrates another solid-state imaging apparatus configured to output a signal for each color component as illustrated in FIG. 12 of Patent Document 2. The solid-state imaging apparatus of Patent Document 2 outputs signals in parallel from a plurality of common output lines, and thus the read time thereof can be faster than that of the Patent Document 1 by the number of parallel lines.
When each of the above solid-state imaging apparatuses reads signals from the holding capacitors, for example, as disclosed in Japanese Patent Application Laid-Open No. 2003-224776 (hereinafter referred to as Patent Document 3), the signals are read through a transfer switch according to the gain corresponding to a capacitively dividing ratio between the total capacitance of the common output lines and the holding capacitance. Assuming that the total capacitance value of the common output lines is CH, and the holding capacitance value is CT, the read gain Gc is expressed as Gc=CT/(CT+CH). Thus, the value of Gc is always less than 1. In order to compensate for lost gain, a gain of 1 or more is multiplied by an output circuit at a following stage thereof before output.
In addition to the above configurations, Japanese Patent Application Laid-Open No. 2008-054246 (hereinafter referred to as Patent Document 4) discloses still another configuration to meet the needs to further improve the S/N ratio. In this configuration, an amplifier circuit is disposed in a vertical transfer unit operating at low speeds and signal amplification is performed by narrowing the band to lower noise.
In recent years, there has been a need to improve productivity of the image reader apparatus such as a copying machine. This trend has accelerated demand for a higher speed solid-state imaging apparatus. One of the factors determining the operation speed of the solid-state imaging apparatus is a charge/discharge time to and from the above described common output line. In other words, the reduction in common output line capacitance is effective to achieve a higher speed. Patent Document 3 discloses a blocking technique for reducing the common output line capacitance by grouping a plurality of pixels in different columns into blocks to reduce the number of transistors connected to the common output lines. Unfortunately, Patent Document 3 considers only the general case where the solid-state imaging apparatus reads one pixel per column, but does not consider the configuration where the solid-state imaging apparatus reads a plurality of color pixels per column at the same time.